Accession Number:

ADA055200

Title:

Design of a Microprocessor Based System for Testing of the NCR 2051 MNOS Memory.

Descriptive Note:

Master's thesis,

Corporate Author:

AIR FORCE INST OF TECH WRIGHT-PATTERSON AFB OHIO SCHOOL OF ENGINEERING

Personal Author(s):

Report Date:

1978-03-17

Pagination or Media Count:

152.0

Abstract:

The U.S. Air Force has begun using MNOS memories in ultrahigh frequency radios to provide nonvolatile storage of preset frequencies. The NCR 2051 is one such memory and it is necessary that the USAF have the capability to perform acceptance testing of these devices as well as to economically perform laboratory tests which may be very time consuming. This report develops a microprocessor-based computer system which will provide the necessary capabilities economically. The design of the Motorola M6800-based system is presented with both hardware and software considerations. The development decisions are discussed and a users manual is provided. Complete assembly language software listings, which realize the acceptance testing requirements, are included. Flowcharts for all test algorithms and schematic diagrams for all interface circuits are also provided. Author

Subject Categories:

  • Electrical and Electronic Equipment
  • Computer Programming and Software
  • Computer Hardware
  • Test Facilities, Equipment and Methods

Distribution Statement:

APPROVED FOR PUBLIC RELEASE