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Electrical Traps in Microwave Materials.
Final scientific rept. 1 Mar 75-28 Feb 78,
RAYTHEON CO WALTHAM MASS RESEARCH DIV
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This program was the final year of a three-year program to identify the sources of trapping centers in gallium arsenide semiconductor devices, to correlate this evidence with device effects and to eliminate or minimize these effects. During the first year of the program we assembled measurement apparatus and established a technique, based on drain current transients, in determining trap activation energies on GaAs FETs using a modification of deep level transient spectroscopy DLTS. During the second year we applied the new DLTS measurement technique, and variations of it, to numerous samples chosen to provide comparisons of different growth and device processing methods. The data has been supplemented by other pulsed and optical experiments which are described in the Second Interim Report. During the final year, we used transient capacitance DLTS techniques by utilizing special FET structures fat FETs and specially-doped test wafers. A hole trap at 0.45 eV due to copper was identified in p-GaAs and an electron trap at 0.34 eV in an n-GaAs IMPATT diode was detected. A technique was devised for identifying trap energy levels from a single DLTS temperature sweep. Surface traps, whose signature differs qualitatively from bulk trap signatures, were discovered in FET wafers.
APPROVED FOR PUBLIC RELEASE