Accession Number:

ADA052894

Title:

Ion Implanted GaAs I.C. Process Technology

Descriptive Note:

Quarterly technical rept. no. 2, 1 Sep-30 Nov 1977

Corporate Author:

ROCKWELL INTERNATIONAL CORP THOUSAND OAKS CA SCIENCE CENTER

Report Date:

1978-03-01

Pagination or Media Count:

67.0

Abstract:

This report presents the second-quarter results of a program to develop an ion implanted planar GaAs integrated circuit process technology. The program involves three subcontractors California Institute of Technology, Cornell University, and Crystal Specialties, Inc. in addition to the Rockwell International Science Center. Work on growth of semi-insulating GaAs in this quarter has emphasized reduction of crystal plane slippage and dislocation density of GaAs crystals. The slippage problem has been considerably reduced by orienting the crystal growth in the 110 direction. Data have been obtained for high-dose selenium implants carried out at room temperature and annealed at 850 C. and for room temperature silicon implants annealed at 850 C. or 900 C. The mask set designed in the first quarter has been used in the fabrication of integrated circuits at the Science Center. A second layer interconnection process has been implemented. Devices and test circuits fabricated with the first mask set have been evaluated. Scaling of FET saturation currents with channel widths required for low power operation has been demonstrated down to a width of 1 micrometers. The Schottky diode FET logic gate designed for this first mask set has shown excellent low frequency performance. Measurements on seven stage ring oscillators utilizing 20 micrometers gate width FET NOR gates have given propagation delays as low as 82 picoseconds with approximately 2 mW gate dissipation.

Subject Categories:

  • Solid State Physics

Distribution Statement:

APPROVED FOR PUBLIC RELEASE