Accession Number:

ADA052613

Title:

Simulation of Digital Circuits.

Descriptive Note:

Master's thesis,

Corporate Author:

ARIZONA UNIV TUCSON DEPT OF ELECTRICAL ENGINEERING

Personal Author(s):

Report Date:

1976-01-01

Pagination or Media Count:

115.0

Abstract:

Simulation is a problem solving procedure for defining and analyzing a model of a system. Computer-aided design of digital logic has provided the design engineer with an aid to reduce the tedious and time consuming task of design verification. This paper describes a simulation technique for the simulation of digital logic circuits. This paper presents a level mode logic simulator that has improved economy in execution time and ease of model generation. The passage of time is simulated in a precise fashion and element models are executed only when activity occurs in the circuit. A behavior model description is accomplished on an element level rather than a gate level. The use of three-valued logic and the use of precise timing delays for both rising and falling signal levels present a very accurate and informative circuit output timing diagram. This is demonstrated by simulation of an even-odd detection circuit and an up-down gray code counter. Author

Subject Categories:

  • Computer Programming and Software

Distribution Statement:

APPROVED FOR PUBLIC RELEASE