Accession Number:

ADA037752

Title:

Planar CMOS/SOS Array Development.

Descriptive Note:

Final rept. 1 Apr 75-31 Aug 76,

Corporate Author:

RCA LABS PRINCETON N J

Personal Author(s):

Report Date:

1976-12-01

Pagination or Media Count:

79.0

Abstract:

Three techniques for planarizing silicon-on-sapphire epitaxial islands are investigated. These three approaches are thermal oxidation isolation, ion-implantation isolation, and SIS silicon-in-sapphire. N-channel MOS transistors fabricated using thermal oxidation isolation exhibit large edge leakage currents and are bias-temperature unstable. Stable p-channel MOS transistors can be fabricated if the field oxide is grown below 950 C in HCl steam. Test transistors fabricated using ion-implantation isolation show very large edge leakage current.

Subject Categories:

  • Electrical and Electronic Equipment
  • Solid State Physics

Distribution Statement:

APPROVED FOR PUBLIC RELEASE