Accession Number:

ADA034880

Title:

Design of the Bus Interface Unit for the Distributed Processor/Memory System.

Descriptive Note:

Master's thesis,

Corporate Author:

AIR FORCE INST OF TECH WRIGHT-PATTERSON AFB OHIO SCHOOL OF ENGINEERING

Personal Author(s):

Report Date:

1976-12-01

Pagination or Media Count:

178.0

Abstract:

The Distributed ProcessorMemory DPM system is a concept developed by the Air Force Avionics Laboratory AFAL. The DPM system is a decentralized, software programmable Processor Element PE which is used to interface the avionics on board an aircraft. Each PE or group of PEs is connected to an aircraft sensor and the PEs are interconnected via a global communication bus. The key characteristic of the DPM is decentralization i.e., each avionic interface module, PE, determines when it will access the global bus whereas present systems are controlled by a central computer. This report is in support of a request from AFAL to design the Bus Interface Unit BIU of the PE. This study, after defining the BIU requirements in detail, uses the AM2900 Bipolar Microprocessor chip set Advanced Micro Devices, Sunnyvale, California to implement the BIU. The hardware, microword format, and data reception microcode were developed. The high-speed and flexibility of the AM2900 chip set as implemented shows that a microprocessor can be used to meet the requirements of a complex hardware system.

Subject Categories:

  • Computer Hardware

Distribution Statement:

APPROVED FOR PUBLIC RELEASE