Channel Select Memory.
Final technical rept. Sep 74-Jul 75,
ELECTRONIC COMMUNICATIONS INC ST PETERSBURG FLA
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A fully decoded 512-bit 32 x 16 MNOS electrically word alterable, semiconductor memory was developed for use in channel preselect applications to control the frequency in UHF communication systems. It includes address and timing buffers, row decoders, column detectors, and inputoutput circuitry. Packaged in a standard 28-pin dual inline ceramic package, the memory characteristics are 1 electrically erasable by word, 2 100 milliseconds erase and write time, 3 8 microseconds read time, 4 2 times 10 to the 11th power read accessesword between refreshes, 5 unpowered nonvolatile data storage one-year minimum, 6 common data inputsoutputs compatible with 400 series CMOS and 5400 TTL, 7 data outputs high impedance when memory deselected, 8 operating temperature -55 C to 125 C, 9 power supply requirements of 5 volts or - 5 volt DC and 28 volts or -1.5 volts DC at 10 milliamps maximum currents. A small quantity of memories selected from three production lots to demonstrate reproducibility were delivered to AFAL. Prior to shipment, a design and device parameter test program was conducted to verify conformance to the above parameters. Author
- Electrical and Electronic Equipment
- Computer Hardware
- Radio Communications