Accession Number:
ADA023174
Title:
Automated Multiple Fault Test Generation for Combinational Networks.
Descriptive Note:
Master's thesis,
Corporate Author:
AIR FORCE INST OF TECH WRIGHT-PATTERSON AFB OHIO SCHOOL OF ENGINEERING
Personal Author(s):
Report Date:
1976-03-01
Pagination or Media Count:
156.0
Abstract:
This report deals with multiple fault detection in combinational logic networks the faults considered are those which may be represented by one or more lines stuck at logic value 0 or 1. Some new theorems and rules are presented which aid in the identification of masking faults, and an algorithm is developed which produces multiple fault detection test sets for single-output combinational logic networks. The algorithm uses a path sensitizing technique to generate tests for members of a set of prime faults any network fault can be represented by a combination of faults from the prime fault set, and a test which detects all combinations of prime faults will detect any single or multiple fault in the network. A modified version of the algorithm is implemented in the FORTRAN computer programming language the automated version produces test sets which are optimal or near-optimal and usually complete. In the test generation process, certain redundancies are also detected.
Descriptors:
Subject Categories:
- Electrical and Electronic Equipment
- Computer Programming and Software
- Computer Systems