Accession Number:

ADA021662

Title:

Reduction of Depth of Boolean Networks with a Fan-In Constraint.

Descriptive Note:

Technical rept.,

Corporate Author:

ILLINOIS UNIV AT URBANA-CHAMPAIGN COORDINATED SCIENCE LAB

Personal Author(s):

• Preparata,F. P.
• Muller,D. E.
• Barak,A. B.

Report Date:

1975-12-01

Pagination or Media Count:

27.0

Abstract:

In this paper a family of techniques for the design of combinational networks whose objective is the reduction of the number of levels, subject to a constraint on the fan-in of the logic gates are presented.

Descriptors:

• *GATES(CIRCUITS)
• *LOGIC CIRCUITS
• *ELECTRICAL NETWORKS
• *BOOLEAN ALGEBRA
• ALGORITHMS
• NETWORKS
• REDUCTION
• DECOMPOSITION

Subject Categories:

• Electrical and Electronic Equipment
• Theoretical Mathematics

Distribution Statement:

APPROVED FOR PUBLIC RELEASE