Accession Number:

ADA021161

Title:

Fault Suppression in a Tree of Galois Linear Modules.

Descriptive Note:

Technical rept.,

Corporate Author:

SPERRY UNIVAC ST PAUL MN DEFENSE SYSTEMS DIV

Personal Author(s):

• Marver, J. M.

Report Date:

1976-01-01

Pagination or Media Count:

27.0

Abstract:

Galois logic design has application to fault tolerant technology. Test vectors and test sequences have been found which test all single and many multiple stuck-at faults in standard Galois linear modules with built-in parity check logic. A straightforward method provides fault detection, location, and suppression in galois linear modules arranged in a GF2 the 4th power tree network having single spares at each level. A single standard module with input multiplexers for test selection and spare selection can be replicated with very minimal additional logic to form a complete linear tree having a high degree of fault tolerance. Author

Descriptors:

• *COMPUTER LOGIC
• *MODULES(ELECTRONICS)
• *FAULT TOLERANT COMPUTING
• LINEAR SYSTEMS
• MULTIPLEXING
• PARITY
• SUPPRESSION
• ELECTRICAL NETWORKS
• LOCATORS
• ERROR DETECTION CODES
• BINARY NOTATION

Subject Categories:

• Computer Systems Management and Standards

Distribution Statement:

APPROVED FOR PUBLIC RELEASE