Application of MOS Hardening Techniques to Bipolar Device Processing.
Final rept. 15 May 74-15 May 75,
TEXAS INSTRUMENTS INC DALLAS
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741 Type operational amplifiers and test bars containing the input npn and lateral pnp transistor of the amplifier were fabricated by several processes which applied where possible techniques developed for hardening MOS transistors to ionizing radiation. The process variations considered included oxide growth conditions, annealing cycles and methods for aluminum evaporation. Data are presented which describes the hFE of the vertical npn and lateral pnp transistor on the test bar as a function of collector current and CO-60 dose for each device process variation. The effect of CO-60 irradiation on the input bias currents and offset voltage of amplifiers irradiated in an input-stressed and a unity-gain configuration is described. The improvement in total ionizing dose hardness which was achieved was dependent on the parameter used for comparison, the bias condition of the amplifier during irradiation, and the magnitude of the parameter at which the comparison was made. At total doses of less than 300,000 radsSi a typical improvement in radiation tolerance of 1.5-3.0 was achieved for amplifier input bias current and the hFEIC 1,10 microamp of the npn and lateral pnp transistors. Author
- Electrical and Electronic Equipment
- Nuclear Radiation Shielding, Protection and Safety
- Solid State Physics