Accession Number:

ADA008814

Title:

Maximum Data Rate Logic Array Development. Volume II. Appendices.

Descriptive Note:

Final rept. 10 Apr 72-10 Sep 73,

Corporate Author:

HUGHES AIRCRAFT CO CULVER CITY CALIF

Personal Author(s):

• Gaskill,James R. , Jr.
• Weill,Lawrence R.
• Flint,James H.
• Kelley,Edwin A.
• Klinechock,John W.

Report Date:

1974-06-01

Pagination or Media Count:

251.0

Abstract:

Contents Transistor models-parameter measurement techniques Current switch delay and rise-time analysis Emitter-foller delay and rise-time analysis Current-switch response to negative-going inputs Common-base delay and rise-time analysis Selected properties of twos complement coding.

Descriptors:

• *LOGIC CIRCUITS
• HIGH RATE
• ARRAYS
• GATES(CIRCUITS)
• INTEGRATED CIRCUITS
• DATA RATE
• EMITTERS
• LOGIC
• COUPLINGS

Subject Categories:

• Electrical and Electronic Equipment

Distribution Statement:

APPROVED FOR PUBLIC RELEASE