A Configurable Parallel Computing System.
Interim rept. Jul 72-Oct 74,
MICHIGAN UNIV ANN ARBOR SYSTEMS ENGINEERING LAB
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This report is concerned with the problem of increasing the speed of computation. A directed graph model of parallel computation with a random access memory is introduced. Unlike previously introduced directed graph models, which were devised primarily as frameworks for the formal study of parallel computation, this model is conceived to be the basis of a viable general purpose machine. It is shown that the model is computationally complete. In terms of topological characteristics of a graph in the model, sufficient conditions are given for this graph to be determinate. A recursive schema analogous to McCarthys conditional expression is defined. A small block oriented high level language is defined, and a translator constructed to translate this language into the directed graph model. A computer architecture is presented in which programs described by the directed graph model can be executed, taking full advantage of the parallelism present in the graph description.
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