Accession Number:

ADA001831

Title:

A Study of Fault Diagnosis of Sequential Logic Networks.

Descriptive Note:

Final rept. 1 Dec 71-31 Oct 74,

Corporate Author:

AUBURN UNIV ALA ENGINEERING EXPERIMENT STATION

Personal Author(s):

Report Date:

1974-10-31

Pagination or Media Count:

25.0

Abstract:

The research conducted on this project was concerned with the problem of test pattern generation for sequential logic circuits. More specifically, an algorithm was sought for generating test patterns for detecting single stuck-at faults in synchronous sequential circuits containing clocked flip-flop memory elements. In addition to the principal problem stated above, the related problems of test pattern generation for combinational iterative logic arrays and of test pattern generation for multiple faults in combinational logic circuits were also studied. A summary of the results obtained and the conclusions reached on the above problems is given. Suggestions for follow-on studies are discussed. Reprints of all papers published on the project are included in an appendix.

Subject Categories:

  • Computer Systems

Distribution Statement:

APPROVED FOR PUBLIC RELEASE