Accession Number:

AD1122333

Title:

A Cross-Layer Framework For Cost-Effective Intellectual Property (IP) Protection

Descriptive Note:

[Technical Report, Final Report]

Corporate Author:

University of California, San DiegoUniversity of Texas at DallasNew York University

Personal Author(s):

• Koushanfar, Farinaz
• Rajendran, Jeyavijayan
• Makris, Yiorgos
• Sinanoglu, Ozgur

Report Date:

2021-02-01

Pagination or Media Count:

40

Abstract:

This report summarizes the progress on the Efficient Cross-Layered IP Protection Scheme ECLIPSE project. In addition to developing security metrics and proofs, we apply the proposed stripped-functionality logic locking SFLL technique and demonstrate it on a field-programmable gate array FPGA platform. The report also highlights our efforts towards protecting multiple outputs of circuit, unlocking circuits using machine learning, and developing a logic tool that implements different variants of logic locking. The report also summarizes the latest benchmarking and red-teaming efforts on our defense as part of Cybersecurity Awareness Worldwide 2019 competition, which was the first logic locking contest.

Descriptors:

• neural networks
• computers
• electronics
• intellectual property
• air force
• computer programming
• energy consumption
• fabrication
• integrated circuits
• machine learning
• semiconductors
• application-specific integrated circuits
• algorithms
• digital signal processing
• genetic algorithms
• standards
• case studies
• field programmable gate arrays
• governments
• information science

Subject Categories:

• Electrical and Electronic Equipment

Distribution Statement:

[A, Approved For Public Release]