Accession Number:

AD1100541

Title:

A Security Framework for Logic Locking Through Local and Global Structural Analysis

Descriptive Note:

Technical Report,06 May 2020,

Corporate Author:

The Ohio State University Columbus United States

Personal Author(s):

Report Date:

2020-06-01

Pagination or Media Count:

134.0

Abstract:

With the globalization of the semiconductor industry and increased reliance on intellectual property IP blocks in integrated circuit IC design malicious modifications, IP theft, and cloning have started to pose a significant economic and security threat. To mitigate this risk, logic locking LL techniques have been proposed to obscure the chip functionality and increase the difficulty to insert a trigger-based change via a hardware trojan. This is accomplished through the introduction of localized key gates, which corrupt the ICs function unless the correct key is supplied. The effectiveness of any LL technique, however, depends on the target design, the extent of locking, and where the locking elements are placed. Current attacks on LL focus primarily on Boolean satisfiability problem SAT solvers, which require the use of a fully operational chip oracle and rely solely on the input and output data through functional testing. To the authors best knowledge, no current attacks exploit the designs underlying structure, vast amount of repetition, or circuit reuse. In this work, we propose a systematic method, borrowed from the network analysis domain, to analyze and exploit the local and global structure of circuits. The methods presented in this work demonstrates that LL minimally effects the underlying structure, allowing for circuit identification and key bit prediction without the need of an oracle. Moreover, this work also presents a framework in which to capture the security level of LL based on the amount of information leakage through our analysis techniques. Additionally, the framework can be expanded to incorporate other attack methods to create an overall security assessment of any implemented LL. To this end, the analyses and theory introduced in this work demonstrate the need for new comprehensive LL techniques, and proposes the method in which to validate their security.

Subject Categories:

  • Electrical and Electronic Equipment

Distribution Statement:

APPROVED FOR PUBLIC RELEASE