Adaptive-Hybrid Redundancy MIPS Version 2.2
Technical Report,12 Sep 2016,12 Sep 2019
Air Force Institute of Technology Wright-Patterson AFB United States
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This report describes in detail the architecture of an Adaptive-Hybrid Redundancy AHR MIPS processor based upon the Basic MIPS processor and Triple Modular Redundancy TMR processor. The AHR MIPS processor is the result of Adaptive-Hybrid Redundancy for Radiation-Hardening research and combines TMR and Temporal Software Redundancy. The AHR MIPS processor is hybrid in that it utilizes both hardware and software redundancy. It is adaptive because it has the capability to switch between TMR and TSR modes. There may be many other applications for the AHR MIPS processor beyond this specific research area.
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