RHBD Techniques for a Sub-Sampling Phase-Locked Loop in 32nm PD-SOI
Vanderbilt University Nashville United States
Pagination or Media Count:
This work details radiation-hardened by design RHBD techniques applied to a 15GHz sub-sampling quadrature phase-locked loop PLL in the 32nm partially-depleted silicon-on-insulator PD-SOI technology node. Radiation vulnerabilities are identified and both component and system level techniques are utilized to mitigate them. This work will provide RF circuit RHBD insight at 32nm PD-SOI and contribute to existing RHBD infrastructure.
- Electrical and Electronic Equipment