Accession Number:

AD1053431

Title:

Design-for-Hardware-Trust Techniques, Detection Strategies and Metrics for Hardware Trojans

Descriptive Note:

Technical Report,15 Sep 2011,14 Sep 2014

Corporate Author:

University of Connecticut - Storrs Storrs United States

Personal Author(s):

Report Date:

2015-12-14

Pagination or Media Count:

54.0

Abstract:

The ARO grant provided support for a full time PhD student in Kan Xiao. Kan is graduating in Dec. 2015 and will join Intel in Jan. 2016.Through the course of this project we developed novel hardware Trojan detection techniques based on clock sweeping. The technique takes advantage of the change in circuit delay because of inserted Trojan. The change is of course minimal, hence we developed an effective classification algorithms to detect minor changes due to Trojan and compared them with those changes made by process variations. This technique was implemented on a large number of Xilinx FPGAs and demonstrated its efficiency. The second major contribution is development of a novel concept called built-in self-authentication BISA. BISA fills in the circuit layouts unused spaces with BISA cells which are functional cells. Using a novel algorithm, the BISA cells are added such that the added structure can be easily tested in less than a micro-second. Any changes to the original circuit andor BISA circuitries can be easily detected. In the 3rd year of the project, we extended this work to combine BISA with split manufacturing. Hence, BISA not only helps with prevention of hardware Trojans in the circuit layout, but also is able to provide an obfuscation capability. The paper was presented in HOST 2014 and received best paper candidate honor.

Subject Categories:

  • Computer Programming and Software

Distribution Statement:

APPROVED FOR PUBLIC RELEASE