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Accession Number:
AD1042244
Title:
A 205GHz Amplifier in 90nm CMOS Technology
Descriptive Note:
Conference Paper
Corporate Author:
SAN JOSE STATE UNIV CA SAN JOSE United States
Report Date:
2017-03-01
Pagination or Media Count:
3.0
Abstract:
This paper presents a 205GHz amplifier drawing 43.4mA from a 0.9V power supply with 10.5dB power gain, Psat of -1.6dBm, and P1dB approximately -5.8dBm in a standard 90nm CMOS process. Moreover, the design employs internal layout-based external using passive embedding around the transistor neutralization techniques for improving performance and yield of the overall system while canceling the effect of internal parasitic capacitors. The fabricated amplifier has the highest operation frequency among all reported amplifiers in 90nm and greater CMOS technologies.
Distribution Statement:
APPROVED FOR PUBLIC RELEASE