Metrics for Analyzing Quantifiable Differentiation of Designs with Varying Integrity for Hardware Assurance
Wright Patterson Air Force Research Labs Dayton United States
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This work proposes an approach to quantifying the integrity of a questionable design by parsing the design into characteristic sub-domains Logical Equivalence, Signal Activity Rate, Functional Correctness, Structural Architecture, and Power Consumption. Measurement techniques are reviewed for each domain which quantify deviation of the actual design away from the expected profiles. A novel method for quantifying the quality of reference used for expected profiles is also proposed. Expected profiles can incorporate a level of overdesign. Finally, the Design Integrity measuring techniques are applied to five Test Article TA cases that showed Error 2 TA to have the lowest integrity of 2.955 and the untampered TA containing the highest integrity of 5.005.
- Computer Systems Management and Standards