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Nanofabrication of Arrays of Silicon Field Emitters with Vertical Silicon Nanowire Current Limiters and Self-Aligned Gates

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Journal Article - Open Access

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Massachusetts Institute of Technology Cambridge United States

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We developed a fabrication process for embedding a dense array 10 exp 8 cm sq -2 of high-aspect-ratio silicon nanowires 200 nm diameter and 10 micrometers tall in a dielectric matrix and then structuredexposed the tips of the nanowires to form self-aligned gate field emitter arrays using chemical mechanical polishing CMP. Using this structure, we demonstrated a high current density 100 A cm sq -2, uniform, and long lifetime 100 h silicon field emitter array architecture in which the current emitted by each tip is regulated by the silicon nanowire current limiter connected in series with the tip. Using the current voltage characteristics and with the aid of numerical device models, we estimated the tip radius of our field emission arrays to be approx 4.8 nm, as consistent with the tip radius measured using a scanning electron microscope SEM.

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