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A Scalable Silicon Photonic Chip-Scale Optical Switch for High Performance Computing Systems

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Journal Article - Open Access

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University of California - Davis Davis

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This paper discusses the architecture and provides performance studies of a silicon photonic chip-scale optical switch for scalable interconnect network in high performance computing systems. The proposed switch exploits optical wavelength parallelism and wavelength routing characteristics of an Arrayed Waveguide Grating Router AWGR to allow contention resolution in the wavelength domain. Simulation results from a cycle-accurate network simulator indicate that, even with only two transmitterreceiver pairs per node, the switch exhibits lower end-to-end latency and higher throughput at high 90 input loads compared with electronic switches. On the device integration level, we propose to integrate all the components ring modulators, photodetectors and AWGR on a CMOS-compatible silicon photonic platform to ensure a compact, energy efficient and cost-effective device. We successfully demonstrate proof-of-concept routing functions on an 88 prototype fabricated using foundry services provided by OpSIS-IME.

Subject Categories:

  • Electrooptical and Optoelectronic Devices

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