5-Kilowatt, 1-Kilovolt, Laminated Sonar Transistor.
Interim engineering rept. no. 5, 1 Jan-31 Mar 70,
RCA SOLID STATE DIV SOMERVILLE NJ
Pagination or Media Count:
Developmental work on the mechanical aspects of the laminated overlay process was completed. Preferential emitter etching was incorporated into the process with emitter site size reduced to 2.5 mils on 5.5-mil centers. A process flow chart and a brief description of the process are presented. Preliminary measurements on laminated etched wafers showed good emitter-junction and collector-junction characteristics however, beta was very low. It appears that the beta problem is associated with the seeding and epitaxial refill operations and is not inherent in the etched wafers. The feasibility of parallel packaging was demonstrated after minor changes were made in the design of the base connector. Thermal-stress measurements indicate severe thermal fatigue of solder-mounted pellets. It is expected that the use of an alloy having a higher lead content will improve this condition substantially. Author
- Electrical and Electronic Equipment
- Acoustic Detection and Detectors