Threshold Elements and the Design of Sequential Switching Networks.
Final rept. Mar 67-Jun 68,
MASSACHUSETTS INST OF TECH CAMBRIDGE ELECTRONIC SYSTEMS LAB
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The report is divided into six sections. Section I is an introduction. Section II is concerned with the realization of sequential machines in the form of a bi-directional shift register and in the form of a unidirectional shift register augmented with a shift register that stores inputs. This section also treats techniques for making sequential machines diagnosable and decomposition of sequential machines with one submachine in the form of a clock. Section III deals with fault detection in combinational logic for a arbitrary networks with single faults, b single threshold gates with multiple faults, and c fault detection and location based on fault tables. Section IV gives further results in the synthesis of multivalued logic networks. Section V reports on a study of two classes of module functions as building blocks in a digital system. The final section discusses topics in design automation of digital systems. Author
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