Accession Number:

AD0813118

Title:

SPEED BUFFERING AND DIGITAL COMBINING TECHNIQUES.

Descriptive Note:

Quarterly rept. no. 2, 1 Oct-31 Dec 66,

Corporate Author:

COMMUNICATION SYSTEMS INC FALLS CHURCH VA

Personal Author(s):

Report Date:

1967-03-01

Pagination or Media Count:

29.0

Abstract:

A complete logic diagram was implemented for the transmitter and receiver of the digital combiner. Critical areas were discussed in detail. Among them were a the elastic store b the frame and reframe time and the choice of the type of logic elements for 10 megabit operation.

Subject Categories:

  • Electrical and Electronic Equipment
  • Computer Hardware

Distribution Statement:

APPROVED FOR PUBLIC RELEASE