Interference in Multiprocessor Computer Systems with Interleaved Memory.
STANFORD UNIV CALIF DIGITAL SYSTEMS LAB
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The authors analyze the memory interference caused by several processors simultaneously using several memory modules. The exact results are computed for a simple model of such a system. The authors derive the limiting value for the relative degree of memory interference as the system size increases. The model of the limiting behavior of the system yields approximate results for the simple model and also suggests that the results are valid for a much larger class of models including those more nearly like real systems than the simple model. The authors test the assumptions and results of the simple model against some measurements of program behavior and simulations of systems using memory references from real programs. Modified author abstract
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