Accession Number:

AD0781182

Title:

Design of a Secure Communications Processor: Central Processor,

Descriptive Note:

Corporate Author:

MITRE CORP BEDFORD MASS

Personal Author(s):

Report Date:

1974-06-01

Pagination or Media Count:

98.0

Abstract:

The Secure Communications Processor is intended as a feasibility model for use in testing and verifying work concerned with the design and certification of secure access controls for computer systems. The system was conceived to be hardware independent, but is implemented on an Intercomputer Communications Corporation i-50 communications processor. The report, the third containing the design details, discusses the Central Processor Pc, half of the dual processor message switch. This volume contains implementation details of the access control and special instructions for the firmware and software requiring certification as well as operating concepts and a Users Manual for constructing the uncertified routines for Pc. Author

Subject Categories:

  • Computer Programming and Software
  • Computer Hardware
  • Computer Systems
  • Computer Systems Management and Standards

Distribution Statement:

APPROVED FOR PUBLIC RELEASE