Accession Number:

AD0773172

Title:

The Design of a Versatile Line Manipulator.

Descriptive Note:

Technical rept.,

Corporate Author:

SYRACUSE UNIV N Y

Personal Author(s):

• Feng,Tse-yun

Report Date:

1973-09-01

Pagination or Media Count:

93.0

Abstract:

81RADCTR-73-292Parallel processors, Parallel processing, Algorithms, Logic circuits, Shift registers, Mathematical logicAssociative processorsA versatile line manipulator which is capable of achieving various data manipulating functions is described. This manipulator design is particularly attractive in applications requiring extensive spacing functions andor operations for non 2s power set or string sizes and replications. The basic circuit has an N-by-N array construction and can be implemented with one circuit type. The flexibility of such a construction is demonstrated and extensive illustrations of implementing basic VLM instructions are given. Author

Descriptors:

• *Parallel processors
• *Parallel processing
• Algorithms
• Logic circuits
• Shift registers
• Mathematical logic

Subject Categories:

• Computer Hardware

Distribution Statement:

APPROVED FOR PUBLIC RELEASE