Accession Number:

AD0747795

Title:

Electrical Overstress Failures in Silicon Devices

Descriptive Note:

Technical rept.

Corporate Author:

ROME AIR DEVELOPMENT CENTER GRIFFISS AFB NY

Personal Author(s):

• Lane, Clyde H.

Report Date:

1972-07-01

Pagination or Media Count:

45.0

Abstract:

Experimental evidence gathered from overstressing test patterns is presented to substantiate a mechanism proposed by the author for surface overstress failures surface zaps. The mechanism involves field enhanced migration of liquid along a line determined by both crystal and electric fields. Migration is initiated by field enhanced breakdown from a defect or precipitate in the silicon which leads to current filament formation and a rise in temperature above the eutectic for Al-Si or Au-Si. It is demonstrated that with titanium contacts, surface shorts are eliminated. Graphs are given which show the relationship between breakdown voltage and electrode spacing and between maximum power dissipation and electrode spacing for aluminum contacts to 5 ohm- cm n-type and 0.5 ohm-cm p-type silicon. Oxidation temperature is identified as a factor which affects zap sensitivity as well.

Descriptors:

• *INTEGRATED CIRCUITS
• *SEMICONDUCTOR DEVICES
• ELECTRICAL PROPERTIES
• ALUMINUM
• SILICON
• GOLD
• THERMAL STRESSES
• FAILURE(ELECTRONICS)

Subject Categories:

• Electrical and Electronic Equipment

Distribution Statement:

APPROVED FOR PUBLIC RELEASE