Validation of DC Parameter Prediction Techniques Used to Assure Semiconductor Radiation Hardness.
Final study rept. 1 Jul 69-31 Aug 70,
MASSACHUSETTS INST OF TECH CAMBRIDGE CHARLES STARK DRAPER LAB
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Approximately 4,200 transistors of medium and thin base width types and a power transistor, representative of transistors to be used in future advanced hardened missile systems, were tested for neutron radiation hardness. The DC parameter prediction technique for h sub FE is accurate within a range of average absolute percent errors from 4 to 10 percent and was implemented at two semiconductor manufacturing facilities, Fairchild and Texas Instruments. Other DC parameters, such as V sub CESAT, LV sub CEO, BV sub CEO, etc., were also predicted with similar accuracy. The DC parameter prediction technique was validated from both the statistical and semiconductor physics point of view. Author
- Electrical and Electronic Equipment
- Solid State Physics