Accession Number:

AD0728513

Title:

Expansion and Compression Buffers for the Phase II DSCS TDMA. Design Plan. Exhibits I, III, and IV.

Descriptive Note:

Corporate Author:

IBM FEDERAL SYSTEMS DIV GAITHERSBURG MD

Personal Author(s):

Report Date:

1971-02-01

Pagination or Media Count:

118.0

Abstract:

The design plan, which consists of four parts, documents the design information pertaining to the recommended expansion or receive and compression or transmit buffers for DSCS 2 TDMA. Exhibit 1 is the functional specification in which the relaton between the expansion and compression buffers and the TDMA system are established. In this context the logical, physical, and operational aspects of the buffer are specified. Exhibit 2 separately bound provides the logic design details of the data flow units specified in Exhibit 1. The component list is given in Exhibit 3 and identifies critical components and vendor sources. Exhibit 4 shows the recommended 15-month development plan for an advanced development model of the buffer. Author

Subject Categories:

  • Computer Programming and Software
  • Computer Hardware
  • Unmanned Spacecraft
  • Non-Radio Communications

Distribution Statement:

APPROVED FOR PUBLIC RELEASE