Accession Number:

AD0669812

Title:

ANALYSIS OF IMPLEMENTATION ERRORS IN DIGITAL COMPUTING SYSTEMS

Descriptive Note:

Technical rept.,

Corporate Author:

WASHINGTON UNIV ST LOUIS MO COMPUTER SYSTEMS LAB

Personal Author(s):

Report Date:

1968-03-01

Pagination or Media Count:

100.0

Abstract:

This report discusses problems encountered with control networks in highly restructurable digital systems. In particular the treatment of implementation errors is covered with emphasis on concurrent processing. The implementation of concurrent processing networks may result in errors which will be quite complex to detect and systematic methods are warranted. A model representing a particular type of computing system is presented, and methods for introducing concurrent control into the model discussed. The automatic detection of a certain class of errors caused by improper design of these systems is investigated. Graph theoretic representation is employed in demonstrating several error detection techniques. The properties of these techniques are compared and it is concluded that one technique, of those investigated, is of sufficient generality, thoroughness, and simplicity in implementation to be used for automatic error analysis.

Subject Categories:

  • Computer Hardware

Distribution Statement:

APPROVED FOR PUBLIC RELEASE