Accession Number:

AD0646506

Title:

A HIGH-SPEED SERIAL ADDER OF THE INTERMDIATE TYPE,

Descriptive Note:

Corporate Author:

FOREIGN TECHNOLOGY DIV WRIGHT-PATTERSON AFB OHIO

Personal Author(s):

Report Date:

1966-10-05

Pagination or Media Count:

9.0

Abstract:

The article examines a high-speed binary serial adder of the intermediate type that is connected with a memory device of the parallel type. For the formation of a digital sum the adder forms the functions Ea, b, Ea b and Q sub saE. The formation of the function Q sub s and the transfer for the next cycle occurs simultaneously. A special trigger of the digital sum preserves the digit of one sum until the Q sub s signal is received, after which its state is reversed and the digital sum S is fixed. It is proposed that the application of this device will remove the basic efficiencies of the existing devices of this type. Author

Subject Categories:

  • Theoretical Mathematics
  • Computer Hardware

Distribution Statement:

APPROVED FOR PUBLIC RELEASE