SYNTHESIS AND RELAIZATION OF COUNTING BISTABLE CIRCUITS.
CALIFORNIA UNIV BERKELEY ELECTRONICS RESEARCH LAB
Pagination or Media Count:
Synthesis procedures are extended for counting bistable circuits from given dc bistable configurations and two silicon-integrated bistable circuits are described. Active devices are presented by a controlled-conductance model which is first derived from a consideration of the principles underlying charge-control device operation. The model is also applicable to non-change-control active devices. These results make evident the straightforward application of the synthesis procedures utilizing enhancement or depletion mode active devices. A linearized active region analysis is carried out for a basic bistable configuration. Either symmetrical or nonsymmetrical triggering techniques are allowed. Conditions are determined for regenerative switching and practical triggering techniques are predicted for the basic FET circuit and a BJT-FET circuit. With minor changes, the conclusions are valid for the cross-coupled and emitter-coupled circuits. A dc bistable circuit and a counting bistable circuit were designed and fabricated in silicon integrated form. Each experimental monolithic circuit incorporates as the active devices one BJT and one FET. Predicted and measured results for dc circuit characteristics and switching times are in reasonable agreement.
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