DEVELOPMENT OF (PCM) DATA BUFFERS.
Quarterly progress rept. no. 7, 22 Jan-25 Apr 65,
STELMA INC STAMFORD CONN
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The purpose of this project is the design and construction of four advanced development models of a low-speed and two of a high-speed converter PCM Buffer, digitalto-digital -- each for inserting a number of digital data channels into Data I or Data II of the PCM Multiplexers TD-352 U or TD-353 U. The High-Speed Buffer Task 1 must be capable of handling synchronous and asynchronous data the Low-Speed unit Task 2, synchronous data only. The manufacturing drawings for the high-speed buffer were delivered. The following work was accomplished on the low-speed buffer a Logic design, including that for the Data Source Simulator, was completed. b Circuit design, incorporating the changes necessitated by addition of the Voice Order-Wire Facility and the Variable-Output-Rate Capability, was completed. c Mechanical design was completed. Fabrication and assembly is in progress. d All printed-circuit-card types passed preproduction tests satisfactorily.