Accession Number:

AD0617298

Title:

SYNTHESIS OF THREE-LEVEL LOGIC CIRCUITS WITH APPLICATION TO A RADIX THREE COMPUTER ARITHMETIC UNIT.

Descriptive Note:

Master's thesis,

Corporate Author:

ILLINOIS UNIV URBANA

Personal Author(s):

Report Date:

1965-05-28

Pagination or Media Count:

61.0

Abstract:

It is known that the use of a larger radix in a digital computer will result in the speeding up of arithmetic operations where the number of recursive steps is reduced with a larger radix. One problem encountered when going to higher radices involves the voltage representation of the digital values, which may lead to the need of additional circuitry just to be able to distinguish between the various voltage levels. Ternary logic has been suggested as a means of controlling timing in sequential circuitry. Adder circuits are presented for use in a radix three computer, and, also three level logic operations which have a more general application.

Subject Categories:

Distribution Statement:

APPROVED FOR PUBLIC RELEASE