DEVELOPMENT OF A GALLIUM ARSENIDE METALOXIDE SEMICONDUCTOR TRANSISTOR.
Final technical documentary rept. 6 May 63-5 May 64,
RADIO CORP OF AMERICA SOMERVILLE N J
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The work described was intended to demonstrate the feasibility of using gallium arsenide for MOS transistors and to develop a process for the production of a few specific samples. The major problem posed by the development of a useful gallium arsenide MOS transistor was the reduction of the state density at the oxide-gallium arsenide interface. The surface varactor was used, as a test vehicle, in the investigation of this interface. Low interface state densities were obtained, and incorporated into the oxide deposition process. A technique for producing low surface concentration n-type diffusions was then developed and used to fabricate devices. To characterize these devices, a model similar to that proposed for the field effect transistor was extended to include the effect of interface states. The report includes a detailed description of the process developed for the fabrication of n-channel depletion type gallium arsenide MOS transistors. Electrical measurements made on several experimental devices are described, and the average mobility of negative charges at the gallium arsenide surface is calculated from the device characteristics. A comparison is made of the characteristics of a gallium arsenide device with those of a typical silicon device, having the same geometry. Author