DEVELOPMENT OF (PCM) DATA BUFFERS.
Quarterly progress rept. no. 3, 21 Jan-17 Apr 64,
STELMA INC STAMFORD CONN
Pagination or Media Count:
The purpose of this project is the design and construction of two advanced development models of a low-speed and a highspeed converter PCM buffer, digital-to-digital -- each for inserting a number of digital data channels into Data I or Data II of the PCM multiplexers TD-352 U or TD-353 U. The high-speed buffer must be capable of handling synchronous and asynchronous data the low-speed unit, synchronous data only. During this quarterly period, final circuit, logic, and mechanical design of the high-speed data buffer was almost entirely finished the Simulator was completed. The design plan was approved by the Signal Corps so that parts may be ordered in quantity. Authorization was received to proceed with the low-speed data buffer subsequently, almost half of the units preliminary logic, circuit, and mechanical design was completed, and the design plan was begun. Author