INVESTIGATION OF LOGIC CIRCUIT COMPLEXES. RELIABILITY AND FAULT MASKING IN HOMOGENEOUS LOGICAL SYSTEMS.
Final rept. 16 Mar 64-15 Apr 66,
SPERRY RAND CORP PHILADELPHIA PA UNIVAC DIV
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The current study continues the comparison of quadded and restored trees. Explicit equations were derived for computing the signal-state reliability which is defined as the probability of correct output for a given function and a given assignment of values to the variables averaged over all variable assignments and all functions. An investigation was made of a new logical structure composed uniformly of diodes. We call the structure a v sub q-module. The v sub q-module, like the micro sub q-module, is capable of executing all functions of q variables. Function selection is also made by applying constant signals to the 2 super scrip q boundary control lines and failure of any component results in the improper execution of at least one of the 2 superscrip 2q functions. The tree which executes all functions of n variables is built out of v sub q-modules and v sub r-modules, where n pq r for some p, and is called the n-variable ql-input AND-OR tree. An optimization study was made to find the q and r for a given n which result in the most reliable n-variable AND-OR tree. Three failure models of the diode were studied and for each a redundance scheme is introduced which renders any homogeneous logic structure composed of diodes arbitrarily reliable. If the diode is open with probability alpha, we replace it by m diodes in parallel. If the diode shorts with probability beta, we replace it by m diodes in parallel. If the diode is open with probability alpha and shorted with probability beta, then it is replaced by a series-parallel or parallel-series array of diodes.
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