Accession Number:

AD0256890

Title:

FLOW-GATING

Descriptive Note:

Corporate Author:

ILLINOIS UNIV URBANA DIGITAL COMPUTER LAB

Report Date:

1961-03-24

Pagination or Media Count:

1.0

Abstract:

Work concerns transistor selection and evaluation, the basic design problem, and the evaluation of the flow-gating memory. The proposed system consists of 14 flow-gating flipflops, which constitute a 14 word 3 transistors per bit, the read-in driver 1814 transistors per bit, the read-out driver 1014 transistors per bit, and termination equipment 211 transistors per bit. The system uses five transistors per bit of which 1214 are GF45011, 4077 are N-101 and the remaining parts are of the N-100 type. The terminal properties are given. The AC behavior is discussed in considerable detail. The read-in speed, after tolerance correction, is less than 90 nsec. the read-out speed is in the vicinity of 80 nsec., when referenced to the input of the respective drivers. This apparently satisfies the proposed requirement of 150 nsec. access times. Author

Subject Categories:

Distribution Statement:

APPROVED FOR PUBLIC RELEASE