Accession Number:

AD0163960

Title:

Method of Preparation of Lead Sulfide PN Junction Diodes.

Descriptive Note:

Patent,

Corporate Author:

DEPARTMENT OF THE NAVY WASHINGTON D C

Personal Author(s):

Report Date:

1973-02-13

Pagination or Media Count:

6.0

Abstract:

The patent describes flat, uniform planar diodes of PbS prepared by either 1 epitaxially growing an n-type layer onto a p-type layer by depositing one layer epitaxially onto the other in a vacuum of at least 5 x 10 to the minus 5th power Torr wherein the substrate is at a temperature between 200-350C and the material to be deposited is at a temperature not lower than its sublimation point or 2 epitaxially growing a p-type layer on an n-type layer using the procedure described in 1 with the addition of vapors of a doping agent such as S, Se or Te, in the system. This method may also be applied to the closely related compounds PbxSn1-xSe and PbxSn1-xTe where x varies from 0 to 1 inclusive.

Subject Categories:

  • Electrooptical and Optoelectronic Devices

Distribution Statement:

APPROVED FOR PUBLIC RELEASE