Accession Number : ADA620053


Title :   FPGA Implementation of Burst-Mode Synchronization for SOQSPK-TG


Descriptive Note : Technical paper Sep 2011-Aug 2014


Corporate Author : KANSAS UNIV LAWRENCE CENTER FOR RESEARCH IN ENGINEERING SCIENCE


Personal Author(s) : Perrins, Erik


Full Text : https://apps.dtic.mil/dtic/tr/fulltext/u2/a620053.pdf


Report Date : Jun 2014


Pagination or Media Count : 11


Abstract : In this paper, we present an FPGA implementation for synchronization of SOQPSK-TG in burst-mode transmissions. The system first detects arrival of new bursts, after which it estimates carrier frequency, carrier phase, and symbol timing offsets. Additionally, it is designed based on the synchronization algorithms developed for the iNET preamble. Here, we introduce some complexity reduction techniques in order to save chip area and to minimize latency. The implementation results are shown to be very close to the computer simulations in terms of estimation error variances and the overall bit-error rate (BER).


Descriptors :   *SYNCHRONIZATION(ELECTRONICS) , ALGORITHMS , CARRIER FREQUENCIES , CHIPS(ELECTRONICS) , ERRORS , ESTIMATES , REDUCTION , SYMBOLS , TRANSMISSIVITY


Subject Categories : Electricity and Magnetism


Distribution Statement : APPROVED FOR PUBLIC RELEASE