Accession Number : ADA568861


Title :   Cache Hardware Approaches to Multiple Independent Levels of Security (MILS)


Descriptive Note : Final rept. Mar 2010-Apr 2012


Corporate Author : IDAHO UNIV MOSCOW CENTER FOR SECURE AND DEPENDABLE SYSTEMS


Personal Author(s) : Rinker, Robert


Full Text : https://apps.dtic.mil/dtic/tr/fulltext/u2/a568861.pdf


Report Date : Oct 2012


Pagination or Media Count : 39


Abstract : The purpose of this research is to explore possible security vulnerabilities in the cache memory systems of modern multicore processors, and to develop the tools necessary for exploring such vulnerabilities, including a model that allows for the simulation of the vulnerability and for the implementation of possible solutions that defeat the effectiveness of the vulnerability.


Descriptors :   *MEMORY DEVICES , *VULNERABILITY , COMMERCIAL EQUIPMENT , COMPUTER ARCHITECTURE , COMPUTER SECURITY , INFORMATION ASSURANCE , MICROPROCESSORS , SIMULATION


Subject Categories : Computer Hardware
      Computer Systems Management and Standards


Distribution Statement : APPROVED FOR PUBLIC RELEASE