Accession Number : ADA427881


Title :   The Chip-Scale Atomic Clock - Recent Development Progress


Descriptive Note : Conference paper


Corporate Author : SYMMETRICOM-TECHNOLOGY REALIZATION CENTER BEVERLY MA


Personal Author(s) : Lutwak, R ; Emmons, D ; English, T ; Riley, W


Full Text : https://apps.dtic.mil/dtic/tr/fulltext/u2/a427881.pdf


Report Date : Sep 2004


Pagination or Media Count : 13


Abstract : We have undertaken the development of a chip-scale atomic clock (CSAC) whose design goals include short-term stability, sigma(sub y)(tau=1 hour), of 1x10(exp 11) with a total power consumption of 30 mW and an overall device volume of 1 cu cm. The stringent power requirement dominates the physics package architecture, dictating a small (5 mm(exp 3) gaseous atomic ensemble interrogated by a low-power semiconductor laser. At PTTI 2002, we reported on initial experimental investigations leading to the decision to employ the coherent population trapping (CPT) interrogation technique. This paper describes our further progress on the CSAC effort, including the development of custom vertical cavity surface emitting laser (VCSEL) sources and techniques for microfabricating miniature cesium vapor cells comprised of anodically bonded silicon and glass. Measurements of the signal contrast and linewidth of both the cesium D1 and D2 resonance transitions are compared, and frequency stability measurements of the CSAC testbed are presented.


Descriptors :   *ATOMIC CLOCKS , LOW POWER , SYMPOSIA , TEST BEDS , SEMICONDUCTOR LASERS , CESIUM , SILICON , BONDED JOINTS , MINIATURIZATION


Subject Categories : Lasers and Masers
      Test Facilities, Equipment and Methods


Distribution Statement : APPROVED FOR PUBLIC RELEASE