Accession Number : ADA417614


Title :   VHDL Modeling and Simulation of a Digital Image Synthesizer for Countering ISAR


Descriptive Note : Master's thesis


Corporate Author : NAVAL POSTGRADUATE SCHOOL MONTEREY CA DEPT OF ELECTRICAL AND COMPUTER ENGINEERING


Personal Author(s) : Kantemir, Oezkan


Full Text : https://apps.dtic.mil/dtic/tr/fulltext/u2/a417614.pdf


Report Date : Jun 2003


Pagination or Media Count : 164


Abstract : This thesis discusses VHDL modeling and simulation of a full custom Application Specific Integrated Circuit (ASIC) for a Digital Image Synthesizer (DIS). The DIS synthesizes the characteristic echo signature of a pre-selected target. It is mainly used against Inverse Synthetic Aperture Radars as an electronic counter measure. The VHDL description of the DIS architecture was exported from Tanner S-Edit, modified, and simulated in Aldec Active HDL(TM), Simulation results were compared with C++ and Matlab simulation results for verification. Main subcomponents, a single Range Bin Processor (RBP), a cascade of 4 RBP 5 and a cascade of 16 RBP 5 were tested and verified. The overhead control circuitry, including Self Test Circuitry and Phase Extractor, was tested separately. Finally, the overall DIS was tested and verified using the control circuitry and a cascade of 4 RBP 5 together, representing the actual 512 RBP 5. As a result of this research, the majority of the DIS was functionally tested and verified.


Descriptors :   *COMPUTERIZED SIMULATION , *TARGET SIGNATURES , *PROGRAMMING LANGUAGES , *SYNTHETIC APERTURE RADAR , MATHEMATICAL MODELS , COMPUTER ARCHITECTURE , THESES , VERY LARGE SCALE INTEGRATION , INTEGRATED CIRCUITS , ECHOES , ACOUSTIC SIGNATURES , COMPUTER PROGRAM VERIFICATION , ELECTRONIC COUNTERMEASURES , COMPLEMENTARY METAL OXIDE SEMICONDUCTORS


Subject Categories : Electrical and Electronic Equipment
      Computer Programming and Software
      Radar Countermeasures


Distribution Statement : APPROVED FOR PUBLIC RELEASE