Accession Number : ADA268271


Title :   DARPA/ISTO Rapid VLSI Implementation


Descriptive Note : Final technical rept.,


Corporate Author : UNIVERSITY OF SOUTHERN CALIFORNIA MARINA DEL REY INFORMATION SCIENCES INST


Personal Author(s) : Parker, Robert


Full Text : https://apps.dtic.mil/dtic/tr/fulltext/u2/a268271.pdf


Report Date : Dec 1991


Pagination or Media Count : 91


Abstract : The overall goal of APT is to investigate and develop high- performance system packing technologies and production approaches to support future increases in computer complexity and system clock rates and to accelerate the incorporation of these approaches in new architecture development. Specific APT goals include: development and demonstration of a system design methodology that factors packaging into system design early in the design cycle rather than treating packing as a post-design process; providing DARPA-sponsored architecture research teams with high-performance packing technology by undertaking small-scale, closely coupled, development efforts that demonstrate methodologies for improved system performance. These technology demonstrations, called Collaborative Development Efforts (CDE), have the following goals: minimizing the risk to collaborating partners by conducting parallel experiments; maximizing future benefit to the collaborating partners through closely coupled, lock-step development; validating and accelerating the incorporation of advanced packaging technology in new architectures through early experiments; and encouraging system architects to design new architectures which are optimized for advanced packing techniques.


Descriptors :   *COMPUTER ARCHITECTURE , *VERY LARGE SCALE INTEGRATION , *INTEGRATED CIRCUITS , *PACKAGING , *FEASIBILITY STUDIES , GALLIUM ARSENIDES , SWITCHING CIRCUITS


Subject Categories : Electrical and Electronic Equipment
      Computer Hardware
      Containers and Packaging


Distribution Statement : APPROVED FOR PUBLIC RELEASE