Accession Number : ADA261002


Title :   A Design of a Fast and Area Efficient Multi-Input Muller C-Element


Descriptive Note : Research rept.


Corporate Author : UNIVERSITY OF SOUTHERN CALIFORNIA MARINA DEL REY INFORMATION SCIENCES INST


Personal Author(s) : Wuu, Tzyh-Yung ; Vrudhula, Sarma B


Full Text : https://apps.dtic.mil/dtic/tr/fulltext/u2/a261002.pdf


Report Date : Jan 1993


Pagination or Media Count : 15


Abstract : A multi-input Muller C-element has frequently been used for joining signal transitions or completion time detection in self-timed circuits. This paper presents an n-input Muller C-element design which uses the multi-level login design technique and has a symmetric format for any integer n 2. In comparison with series-parallel MOS structure implementations and C-element tree implementations, our design has fewer restrictions in terms of n, less path delay, less delay variance from inputs to output, and less area consumption. Experimental validation in this paper is based on an industrial standard cell library.... Muller C-element, MOS, Standard cells, Self-timed circuits, Signal transitions, Path delay, Cell area.


Descriptors :   *SELF OPERATION , *TIMING CIRCUITS , INPUT , OUTPUT , EXPERIMENTAL DATA , DETECTION , VALIDATION , CELLS , PATHS , EFFICIENCY , LIBRARIES , CIRCUITS , TRANSITIONS , CONSUMPTION , METAL OXIDE SEMICONDUCTORS , TIME , SIGNALS , SYMMETRY , FORMATS , DELAY , STANDARDS


Subject Categories : Electrical and Electronic Equipment


Distribution Statement : APPROVED FOR PUBLIC RELEASE