Accession Number : ADA257712


Title :   Scan-Based Switching Tests


Descriptive Note : Final technical rept.


Corporate Author : HARRIS CORP MELBOURNE FL GOVERNMENT INFORMATION SYSTEMS DIV


Personal Author(s) : Bashaw, Larry D ; Vriezen, Ted H


Full Text : https://apps.dtic.mil/dtic/tr/fulltext/u2/a257712.pdf


Report Date : Jul 1992


Pagination or Media Count : 52


Abstract : This report describes an algorithm for generating scan-based switching tests. The only design consideration required by this algorithm, besides the scan design is the capability to execute two functional clocks with a desired interval between logic scans. The algorithm generates a test vector which is scanned in to cause the source register of the delay path to toggle on the first clock, and captures a transition at the output register of the delay path on the second clock. The algorithm also identifies paths that are not testable, and identifies the points of conflict.


Descriptors :   *TEST AND EVALUATION , *CLOCKS , *SWITCHING , *INTEGRATED CIRCUITS , *SWITCHING CIRCUITS , ALGORITHMS , DELAY , TRANSITIONS , TIME STUDIES , INTERVALS , LOGIC , CIRCUITS , CONFLICT , PATHS , REACTION TIME , OUTPUT


Subject Categories : Test Facilities, Equipment and Methods


Distribution Statement : APPROVED FOR PUBLIC RELEASE