Accession Number : ADA257334


Title :   Temperature Distribution and Thermally Induced Stresses in Electronic Packages


Descriptive Note : Master's thesis


Corporate Author : NAVAL POSTGRADUATE SCHOOL MONTEREY CA


Personal Author(s) : Sapsai, Jr, Andrei


Full Text : https://apps.dtic.mil/dtic/tr/fulltext/u2/a257334.pdf


Report Date : Sep 1992


Pagination or Media Count : 104


Abstract : This investigation is concerned with the steady state temperature and thermally induced stress distributions in electronic packages due to heat generated by the chip. Finite Element codes were employed to solve for the distribution of temperature and stresses within the package. Four parametric studies were undertaken to determine their effects on system behavior. The material study considered two chip and two solder materials and four substrate materials. Convective heat transfer was varied from 200 W/M2 deg C through 500 W/M2 deg C. In the geometric study, chip height to overall height was varied. The effect of package encapsulation was studied. Results are presented for both temperature and stress distributions at the solder interfaces. Thermoelastic stresses, Tri-material package.


Descriptors :   *ELECTRONIC EQUIPMENT , *THERMAL STRESSES , STRESSES , HEAT TRANSFER , STEADY STATE , ELECTRONICS , SUBSTRATES , ENCAPSULATION , CONVECTION(HEAT TRANSFER) , THERMOELASTICITY , BENDING STRESS , HEIGHT , BEHAVIOR , SHEAR STRESSES , CHIPS(ELECTRONICS) , TEMPERATURE , DISTRIBUTION , INTERFACES


Subject Categories : Electrical and Electronic Equipment
      Thermodynamics


Distribution Statement : APPROVED FOR PUBLIC RELEASE